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DEVICE CONNECTIONS *
BLOCK DIAGRAM
COUNT (C) - CMOS, Schmidt Trigger; counter increments on negative going
transition.
RESET (R) - CMOS, Schmidt Trigger; counter is reset to zero when input is
low. Counter should always be reset to zero whenever power is first applied
to the unit.
LATCH (L) - CMOS, Schmidt Trigger; when pulled low, the latches are
transparent and display is updated as new counts are received. When latch
input is pulled high, the display registers count existing immediately prior to
activating the latch.
TEST (T) - CMOS, Schmidt Trigger; Input must be connected to V DD . This
input is used by manufacturer during factory testing.
V DD - +VDC Supply.
V DD
T
TEST
R
RESET
C
COUNT
+V
COUNT PULSES
V SS - Common for D.C. Supply and Inputs.
* All unused inputs must be tied to either V DD or V SS , whichever is appropriate.
L
LATCH
LATCH &
MULTIPLEX
LOGIC
LATCH
DIG.6 DIG.5 DIG.4 DIG.3 DIG.2
(MSD) COUNTER
MULTIPLEXER
DIG.1
(LSD)
BCD TO 7
SEGMENT
DECODER
MUX REASSEMBLER WITH
LEADING ZERO BLANKING,
DISPLAY LATCHES & DRIVERS
V SS
7
7
7
7
7
7
BACK
PLANE
6-DIGIT LCD DISPLAY
CAUTION
This device contains CMOS circuitry which requires special anti-static
handling to the same degree required by standard CMOS integrated circuits.
Units should be stored in the conductive packaging used to ship the devices.
Containers should be opened and units handled only on a conductive table
top by personnel wearing wrist-strap grounding equipment. These devices
have the same protection circuits as standard CMOS devices to prevent
damage to inputs due to nominal over-voltage.
MAXIMUM RATINGS (VOLTAGE REF. TO V SS )
RATING SYMBOL VALUE
DC Supply Voltage V DD -0.5 to +5.25
Input Voltage, All Inputs V I -0.5 to (VDD +0.5)
Operating Temperature T A -35 to +85
Storage Temperature T STG -35 to +85
UNIT
VDC
VDC
°C
°C
ELECTRICAL CHARACTERISTICS V DD TYP, 25 °C UNLESS OTHERWISE SPECIFIED
SYMBOL
V DD
PARAMETER
Supply Voltage
UNIT
VDC
TEST CONDITION
MIN.
3.5
SCUB1/SCUB2
TYP
5.0
MAX
5.25
MIN.
2.7
S CUB1LV
TYP
3.3
MAX
3.6
I DD
I DDQ
Supply Current
Quiescent Current
μA
μA
10 KHz Count Rate
0 on display
55
45
30
20
V IH
V IL
I IL
Frequency
T RST
T LATCH
Input High Voltage
Input Low Voltage
Input Leakage
Current
Count Frequency
Reset Pulse Width
Latch Pulse Width
VDC
VDC
μA
KHz
μsec
μsec
V DD ≥ V IN ≥ V SS
2.45
1.575
10
25
25
0.01
3.675
2.3625
1.89
1.215
10
25
25
0.01
2.52
1.62
2
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